It has been a long-standing desire of the microelectronics and telecommunications industries to combine optoelectronic components with silicon (Si) circuitry. A conventional solution for this combination includes a hybrid integration of optical components with Si integrated circuits (ICs). However, monolithic integration of optoelectronics with Si circuitry is far superior to the hybrid integration for several reasons. Monolithic integration yields more compact devices; lower packaging costs; lower processing costs; and improved device characteristics in applications where hybrid integration yields undesirable electrical parasitics.
It is therefore desirable to create a monolithically integrated structure containing both optoelectronic functionality and Si CMOS circuitry. However, an intrinsic problem with integrating optoelectronics functionality into Si chips is that Si itself is not a good optically-active (i.e., optoelectronic) material as it neither emits nor detects light efficiently. Generally, optically-active materials can include group IV or III-V semiconductor materials such as GaAs, InP, AlGaAs, InGaAs, InGaAsP for the optoelectronic functionality of the device. Due to the large lattice mismatch and thermal expansion coefficient mismatch between these materials and Si, monolithically integrated devices have been performance limited by the resulting crystalline defects (e.g., threading dislocations) from epitaxy. However, recent progress in defect filtering schemes includes graded buffer layers or epitaxial lateral overgrowth to enable the creation of lattice-mismatched epitaxial layers of suitable quality for optoelectronic devices.
Thus, there is a need to overcome these and other problems of the prior art and to provide techniques for high-quality monolithic integration of optically-active materials on silicon.